TL;DR: JEDEC, the group that develops open requirements for the microelectronics business, has pulled again the curtain on two new reminiscence module requirements that promise to ship a large bandwidth increase – the DDR5 Multiplexed Rank Twin Inline Reminiscence Module (MRDIMM) and a next-gen Compression-Connected Reminiscence Module (CAMM) for LPDDR6. These requirements might unlock important bandwidth will increase wanted to feed more and more highly effective CPUs, GPUs, and AI accelerators over the following few years.
At the moment within the works by JEDEC’s JC-45 committee, MRDIMM is a brand new module kind that makes use of multiplexing to mix a number of knowledge indicators and transmit them over a single channel, successfully growing bandwidth with out including extra bodily pins and traces. The purpose is for MRDIMMs to ship as much as double the height bandwidth of ordinary DDR5 RDIMM modules.
MRDIMMs will assist even greater knowledge charges as much as 12.8 Gbps per pin, in comparison with 6.4 Gbps for present DDR5 RDIMMs. They’re being designed for future scalability to permit multi-generational compatibility during the DDR5 roadmap.
Regardless of the unconventional will increase in bandwidth, MRDIMMs will use the identical normal DDR5 DIMM elements like DRAM chips, energy administration, and SPD hubs to keep up compatibility with present platforms.
JEDEC can also be planning a brand new “Tall MRDIMM” type issue to maximise density. This taller design will allow twice the variety of DRAM single-die packages to be mounted on the DIMM with out the necessity for 3DS packaging.
For cell functions, JEDEC is working in parallel on an up to date module design for the LPDDR6 reminiscence kind utilized in smartphones, tablets, and ultra-thin notebooks. Constructing on the prevailing JESD318 CAMM2 normal that enabled DDR5 and LPDDR5(X) modules, the brand new LPDDR6 CAMM design goals to hit switch speeds larger than 14.4 GT/s. It should additionally incorporate a 24-bit sub-channel, a 48-bit general channel width, and a connector array, doubling throughput over LPDDR5 CAMM. The compact design ought to enable these new modules for use in skinny, thermally-constrained cell gadgets with out requiring soldered RAM.
Each the DDR5 MRDIMM and LPDDR6 CAMM designs stay works in progress at JEDEC. However as soon as they’re out, they will show essential for chips like Nvidia’s Blackwell and Rubin GPUs which might be on the horizon. They will pack insane core counts, so these new reminiscence applied sciences might show instrumental in assuaging any potential bottlenecks.
